Sigasi is all about efficiency - we live to boost hardware design productivity (and cut out monotony) 🤗 Here's a simple trick: stop using your mouse. Keyboard shortcuts for the win: zurl.co/H4MM #DesignAutomation #Productivity

Gorgeous weather here at Sigasi headquarters at the mo. We celebrated with an impromptu BBQ outside 😎 How do you and your colleagues enjoy the summer months?

Psst! We're getting close to the next Sigasi release. Want to see what 5.3 will bring? Check out the preview: zurl.co/kGRs And stay tuned for the release!

📢 We're thrilled to announce that we've appointed Dirk Seynhaeve as our new VP for Business Development. Welcome to the team, Dirk! You can read our full press release here: zurl.co/D9yQ #NewHire

Sigasi 5.3 has arrived! 🔄 Update now to enjoy many new VHDL linting rules, better support for SystemVerilog parameterized classes, and more control over project-specific guidelines & conventions with new preference settings: zurl.co/BeAc #SigasiRelease #HDL #RTL

Today we're at the ICE_Expo in London. There's no #CyberSecurity possible without safe and secure silicon - and there's no safe and secure silicon without Sigasi! By helping hardware design teams input, check, verify, & safeguard their code, we help make chips more secure.

We were pleased to be able to present Sigasi to the Space Business Innovation Centre Noordwijk community yesterday afternoon. The space industry's innovative technologies can expand the boundaries of #DigitalChipDesign. We hope we can contribute to the novel approaches being explored there!

Sigasi Studio offers a range of powerful features that significantly enhance your coding experience, but it’s crucial to configure your projects properly. Check out our guide for streamlined project setup: zurl.co/n0XK #VHDL #Verilog #SystemVerilog #IDE #HDL

Sigasi 5.4 is coming soon. Want a sneak peek? Check out the preview here: zurl.co/oDrL - VS Code is getting full diagram support and documentation exports - a new linting rules preference page - a range of new linting rules specifically for UVM Enjoy the preview! 🤗

Sigasi 5.4 here! 🔄 Update now to enjoy - new UVM linting rules - simpler linting rule configuration in Eclipse - diagrams and documentation generation in VS Code Get the full release notes: zurl.co/sPeY #SigasiRelease #HDL #IDE

Last week we released Sigasi 5.4 - woohoo! One of the major new features? 🤓 NEW UVM Linting Rules Wanna check 'em out? You can read the release notes with all the details here 👉 zurl.co/0IOE End your year on a high note, upgrading now 🤗 zurl.co/aHch

Just in time for year’s end, we released Sigasi 5.4 🎉 It's a real treat for our VS Code users: you’re getting full diagram support, documentation generation, and linting rule configurability. Woot! Check out our full release notes here 👉 zurl.co/F4dN

As the sun sets on another year, we at Sigasi want to thank all our customers, partners, and team members for the excellent work of 2023. May the sun rise onto 2024 with new opportunities, perspectives, & adventures! Happy New Year!

We've been a little quiet recently because we've been busy cooking up really exciting developments. Today, we're releasing Sigasi 5.5, but this is just the tip of the iceberg. 💪 Stay tuned for exciting news coming soon! 😎 5.5 release info is here: zurl.co/OoOT

✨ We're delighted to announce Sigasi's new look and feel! ✨ Sigasi empowers hardware engineers to achieve excellence in HDL creation, integration, and validation—now with a fabulous new appearance. 🤗 Check out the details here: zurl.co/LOyI

📢 Announcing Sigasi® Visual HDL™! SVH™ lets users create, integrate, & validate HDL code with Integrated Development, Synchronous Visualization, & Shift-Left Validation. Available for download during DAC, The Chips to Systems Conference . (We'll be booth 2416) Get all the info: zurl.co/hl54

We're here! Can't wait to get started exhibiting DAC, The Chips to Systems Conference tomorrow. Do stop by booth 2416 (2nd floor) if you're here!

We're here! Sigasi is at DAC, The Chips to Systems Conference AND Sigasi® Visual HDL™ (SVH™) is online! Check us out and download the new extension from the VS Code marketplace: zurl.co/a7lj Find us at DAC at booth 2416 on the 2nd floor.

Having a great time at the first day of DAC, The Chips to Systems Conference. Our T-shirts and water bottles are proving popular. Don’t have one yet? Be sure to stop by booth 2416! 👕

Did you miss the Semiconductor Engineering "Experts at the Table" discussion about system-level design's future? No worries—catch up here: zurl.co/zUYA We're honored Ann asked our VP for Business Development back 🤗 Well done, Dirk!